D4.2 - – Handbook of test methodologies and applicable facilities for advanced systems

Submitted by acoronet on Sat, 05/15/2021 - 11:43


This document provides insights on the use of system-level radiation testing as a qualification tool for a set of specific space systems associated with high-risk acceptance missions, benevolent and mild radiative environments, and use of commercial-off-the-shelf (COTS) microelectronic devices or assemblies of fully commercial systems.

D3.4 - Risk assessment and application procedure of system test methodologies based on a SDR development for space application

Submitted by acoronet on Sat, 05/15/2021 - 11:42


This report presents the design methodology of a highly integrated and radiation-tolerant software-defined radio (SDR) for multi-band radio applications for space applications. From the proposed risk-assessment methodology, the user is provided with the instruments to understand whether commercial-of-the-shelf (COTS) components would be a suitable option for the system under design or whether it would be recommended to use high-reliably, radiationhardened or space-qualified parts.

D3.3 - Collection and documentation of testing tools and facilities required for system level tests

Submitted by acoronet on Sat, 05/15/2021 - 11:41


This report provides a collection and documentation of different facilities and tools suitable for system level testing. System level test consist in analyzing the radiation response of a system instead of the different functional units or components that compose it, as performed at component level.

D3.2 - Final Report on system level test methodology compared with component test results

Submitted by acoronet on Sat, 05/15/2021 - 11:40


This report summarizes results obtained within RADSAGA WP3 regarding system-level and component-level test comparison, but most specifically addresses outcome of ESR12 experiments with system-level tests of the Point-ofLoad (PoL) converter from 3D-Plus. Therefore, the first section of the report introduces briefly several system-level tests of PoL performed in different test facilities.

D1.4 - Documentation of test setups practical for mixed-field facilities

Submitted by acoronet on Sat, 05/15/2021 - 11:37


The document provides an overview of possibilities and criticalities arising from testing a complex system in mixedfield radiation environments. Mixed-field facilities along with spallation facilities are and will be critical infrastructures for radiation testing in the coming years. Their main enabler is the possibility of performing system level testing.

D2.3 - Design Status Report and Prototype of the Radiation-Tolerant CMOS Imager

Submitted by acoronet on Sat, 05/15/2021 - 11:35


This report details the status of the project on radiation-tolerant CMOS image sensors (ESR 11). The aim of this project is to provide new radiation hardening by design (RHBD) techniques for CMOS image sensors. Since an image sensor is a system with multiple components, effects of radiation in each of its components were investigated first based on literature. This is to determine which component contributes the most to changes on behavior of the system due to radiation.

D2.2 - Status report on coupled effects and prediction tools

Submitted by acoronet on Sat, 05/15/2021 - 11:34


This report provides the current status of the project which focus on coupled radiation and aging effects on wide bandgap power devices (ESR7).The goal of the coupled effect study is to investigate the impact of aging on radiation sensitivity of the component and/or system and impact of radiation on components/systems long term reliability. Indeed, electrical stresses are known to appear all along the life of a power converter. 

D1.2 - Design status report and prototype of SRAM radiation monitor

Submitted by acoronet on Sat, 05/15/2021 - 11:31


The goal of this project is to develop an SRAM (Statistic Radom Access Memory) chip in an advanced CMOS technology where the sensitivity to radiation is made tuneable by design rather than minimised. Also, the SRAM has fast access time with 50MHz clock, 786Kbit per 4mm2 high implantation density and <0.5mW low power consumption.